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author | Kyungmin Park <kyungmin.park@samsung.com> | 2007-12-13 01:39:29 +0100 |
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committer | Kyungmin Park <kyungmin.park@samsung.com> | 2008-01-29 09:12:32 +0100 |
commit | b2581be291aa8595eadf3d6933d04d0f1d01b46d (patch) | |
tree | 417b79c040ade3b51113d97c67b4e7eef112b2da | |
parent | [MTD] [OneNAND] Get correct density from device ID (diff) | |
download | linux-b2581be291aa8595eadf3d6933d04d0f1d01b46d.tar.xz linux-b2581be291aa8595eadf3d6933d04d0f1d01b46d.zip |
[MTD] [OneNAND] Check the initial bad block using ONENAND_CTRL_ERROR
Some chips don't set the ONENAND_CTRL_LOAD bit.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
-rw-r--r-- | drivers/mtd/onenand/onenand_base.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index cf8009329999..44c327a335e7 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -1119,12 +1119,10 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state) interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); + /* Initial bad block case: 0x2400 or 0x0400 */ if (ctrl & ONENAND_CTRL_ERROR) { printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl); - /* Initial bad block case */ - if (ctrl & ONENAND_CTRL_LOAD) - return ONENAND_BBT_READ_ERROR; - return ONENAND_BBT_READ_FATAL_ERROR; + return ONENAND_BBT_READ_ERROR; } if (interrupt & ONENAND_INT_READ) { |