diff options
author | Conor Dooley <conor.dooley@microchip.com> | 2022-10-11 00:17:05 +0200 |
---|---|---|
committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-10-11 21:39:14 +0200 |
commit | abbb388d335f8c400d1baecb15d360fa0062de77 (patch) | |
tree | 2c21b91c5b0502cfcfd79113d7283b9bfb4fdb4f | |
parent | MAINTAINERS: update polarfire soc clock binding (diff) | |
download | linux-abbb388d335f8c400d1baecb15d360fa0062de77.tar.xz linux-abbb388d335f8c400d1baecb15d360fa0062de77.zip |
dt-bindings: riscv: update microchip.yaml's maintainership
Daire and I are the platform maintainers for Microchip's RISC-V
FPGAs. Update the maintainers in microchip.yaml to reflect this and
explicitly add the binding to the SoC's MAINTAINERS entry.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221010221704.2161221-3-conor@kernel.org/
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
-rw-r--r-- | Documentation/devicetree/bindings/riscv/microchip.yaml | 4 | ||||
-rw-r--r-- | MAINTAINERS | 1 |
2 files changed, 3 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 1aa7336a9672..9faf8447332b 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip PolarFire SoC-based boards device tree bindings maintainers: - - Cyril Jean <Cyril.Jean@microchip.com> - - Lewis Hanly <lewis.hanly@microchip.com> + - Conor Dooley <conor.dooley@microchip.com> + - Daire McNamara <daire.mcnamara@microchip.com> description: Microchip PolarFire SoC-based boards diff --git a/MAINTAINERS b/MAINTAINERS index 94cf47ea5f80..b3415857a812 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17651,6 +17651,7 @@ F: Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml F: Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml F: Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml F: Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml +F: Documentation/devicetree/bindings/riscv/microchip.yaml F: Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml F: Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml F: Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml |