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authorH. Nikolaus Schaller <hns@goldelico.com>2023-02-15 18:31:56 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2023-02-19 09:24:13 +0100
commitab47b3dae55300868efd0d4eb0d66a5d43315092 (patch)
treecf3945be0c5db828c9c15c8b0e81a2a248608720
parentMIPS: dts: Boston: Fix dtc 'pci_device_reg' warning (diff)
downloadlinux-ab47b3dae55300868efd0d4eb0d66a5d43315092.tar.xz
linux-ab47b3dae55300868efd0d4eb0d66a5d43315092.zip
MIPS: DTS: jz4780: add #clock-cells to rtc_dev
This makes the driver present the clk32k signal if requested. It is needed to clock the PMU of the BCM4330 WiFi and Bluetooth module of the CI20 board. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-rw-r--r--arch/mips/boot/dts/ingenic/jz4780.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index c182a656d63b..18affff85ce3 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -155,6 +155,8 @@
clocks = <&cgu JZ4780_CLK_RTCLK>;
clock-names = "rtc";
+
+ #clock-cells = <0>;
};
pinctrl: pin-controller@10010000 {