diff options
| author | Jonas Gorski <jogo@openwrt.org> | 2014-07-12 12:49:37 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 15:28:34 +0200 |
| commit | 3534b5ce0547790429d40b19bb444e099f6ba1cf (patch) | |
| tree | 28c572062c13de1ea5028fe53e776fd6afbde1e0 | |
| parent | MIPS: BCM63xx: Append irq line to irq_{stat,mask}* (diff) | |
| download | linux-3534b5ce0547790429d40b19bb444e099f6ba1cf.tar.xz linux-3534b5ce0547790429d40b19bb444e099f6ba1cf.zip | |
MIPS: BCM63xx: Populate irq_{stat,mask}_addr for second cpu
Set it to zero if there is no second set.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/bcm63xx/irq.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index 91d1765561b5..f467e447bb0e 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -342,11 +342,15 @@ static void bcm63xx_init_irq(void) irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF); irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF); + irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF); + irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF); switch (bcm63xx_get_cpu_id()) { case BCM3368_CPU_ID: irq_stat_addr[0] += PERF_IRQSTAT_3368_REG; irq_mask_addr[0] += PERF_IRQMASK_3368_REG; + irq_stat_addr[1] = 0; + irq_stat_addr[1] = 0; irq_bits = 32; ext_irq_count = 4; ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368; @@ -354,6 +358,8 @@ static void bcm63xx_init_irq(void) case BCM6328_CPU_ID: irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0); irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0); + irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1); + irq_stat_addr[1] += PERF_IRQMASK_6328_REG(1); irq_bits = 64; ext_irq_count = 4; is_ext_irq_cascaded = 1; @@ -364,6 +370,8 @@ static void bcm63xx_init_irq(void) case BCM6338_CPU_ID: irq_stat_addr[0] += PERF_IRQSTAT_6338_REG; irq_mask_addr[0] += PERF_IRQMASK_6338_REG; + irq_stat_addr[1] = 0; + irq_mask_addr[1] = 0; irq_bits = 32; ext_irq_count = 4; ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338; @@ -371,6 +379,8 @@ static void bcm63xx_init_irq(void) case BCM6345_CPU_ID: irq_stat_addr[0] += PERF_IRQSTAT_6345_REG; irq_mask_addr[0] += PERF_IRQMASK_6345_REG; + irq_stat_addr[1] = 0; + irq_mask_addr[1] = 0; irq_bits = 32; ext_irq_count = 4; ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345; @@ -378,6 +388,8 @@ static void bcm63xx_init_irq(void) case BCM6348_CPU_ID: irq_stat_addr[0] += PERF_IRQSTAT_6348_REG; irq_mask_addr[0] += PERF_IRQMASK_6348_REG; + irq_stat_addr[1] = 0; + irq_mask_addr[1] = 0; irq_bits = 32; ext_irq_count = 4; ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348; @@ -385,6 +397,8 @@ static void bcm63xx_init_irq(void) case BCM6358_CPU_ID: irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0); irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0); + irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1); + irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1); irq_bits = 32; ext_irq_count = 4; is_ext_irq_cascaded = 1; @@ -395,6 +409,8 @@ static void bcm63xx_init_irq(void) case BCM6362_CPU_ID: irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0); irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0); + irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1); + irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1); irq_bits = 64; ext_irq_count = 4; is_ext_irq_cascaded = 1; @@ -405,6 +421,8 @@ static void bcm63xx_init_irq(void) case BCM6368_CPU_ID: irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0); irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0); + irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1); + irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1); irq_bits = 64; ext_irq_count = 6; is_ext_irq_cascaded = 1; |