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| author | Alvaro Gamez Machado <alvaro.gamez@hazent.com> | 2019-10-24 13:07:55 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-10-24 13:45:11 +0200 |
| commit | e3354b17b4ac10ad2c23e244444ab38927a69ee9 (patch) | |
| tree | 75819d585f4058791a426f6a05a55f6697d78aec | |
| parent | spi: Fix spelling in the comments (diff) | |
| download | linux-e3354b17b4ac10ad2c23e244444ab38927a69ee9.tar.xz linux-e3354b17b4ac10ad2c23e244444ab38927a69ee9.zip | |
spi: xilinx: add description of new property xlnx,num-transfer-bits
This property is used to set the number of bits per transfer (bits_per_word).
Xilinx' IP core allows either 8, 16 or 32, and is non changeable on runtime,
only when instantiating the core.
Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
Link: https://lore.kernel.org/r/20191024110757.25820-2-alvaro.gamez@hazent.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/spi/spi-xilinx.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt index dc924a5f71db..5f4ed3e5c994 100644 --- a/Documentation/devicetree/bindings/spi/spi-xilinx.txt +++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt @@ -8,7 +8,8 @@ Required properties: number. Optional properties: -- xlnx,num-ss-bits : Number of chip selects used. +- xlnx,num-ss-bits : Number of chip selects used. +- xlnx,num-transfer-bits : Number of bits per transfer. This will be 8 if not specified Example: axi_quad_spi@41e00000 { @@ -17,5 +18,6 @@ Example: interrupts = <0 31 1>; reg = <0x41e00000 0x10000>; xlnx,num-ss-bits = <0x1>; + xlnx,num-transfer-bits = <32>; }; |