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authorYixun Lan <yixun.lan@amlogic.com>2018-05-03 15:26:24 +0200
committerJerome Brunet <jbrunet@baylibre.com>2018-05-15 14:19:43 +0200
commit24a2e6796eb23d17d4e32a27f19336248666272c (patch)
tree1106f2718122b59793d59b8484297da8c7c116fa
parentclk: meson-axg: Add AO Clock and Reset controller driver (diff)
downloadlinux-24a2e6796eb23d17d4e32a27f19336248666272c.tar.xz
linux-24a2e6796eb23d17d4e32a27f19336248666272c.zip
clk: meson: drop CLK_SET_RATE_PARENT flag
The clk81 is not expected to be changed, so drop this flag. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-rw-r--r--drivers/clk/meson/gxbb-aoclk.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/meson/gxbb-aoclk.c b/drivers/clk/meson/gxbb-aoclk.c
index 20f73e0d82a4..408e3e2fca18 100644
--- a/drivers/clk/meson/gxbb-aoclk.c
+++ b/drivers/clk/meson/gxbb-aoclk.c
@@ -69,7 +69,7 @@ static struct clk_regmap _name##_ao = { \
.ops = &clk_regmap_gate_ops, \
.parent_names = (const char *[]){ "clk81" }, \
.num_parents = 1, \
- .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \
+ .flags = CLK_IGNORE_UNUSED, \
}, \
}