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| author | Christoph Hellwig <hch@lst.de> | 2019-08-03 11:38:31 +0200 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2019-08-29 16:43:33 +0200 |
| commit | 3e4e1d3fb89193cc072858e1469d6f2926c603f7 (patch) | |
| tree | ebe5eaf02d6c67fc232ae004c0de611e981d3015 | |
| parent | dma-mapping: make dma_atomic_pool_init self-contained (diff) | |
| download | linux-3e4e1d3fb89193cc072858e1469d6f2926c603f7.tar.xz linux-3e4e1d3fb89193cc072858e1469d6f2926c603f7.zip | |
arm64: document the choice of page attributes for pgprot_dmacoherent
Based on an email from Will Deacon.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
| -rw-r--r-- | arch/arm64/include/asm/pgtable.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 6700371227d1..fd40fb05eb51 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -435,6 +435,14 @@ static inline pmd_t pmd_mkdevmap(pmd_t pmd) __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN) #define pgprot_device(prot) \ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN) +/* + * DMA allocations for non-coherent devices use what the Arm architecture calls + * "Normal non-cacheable" memory, which permits speculation, unaligned accesses + * and merging of writes. This is different from "Device-nGnR[nE]" memory which + * is intended for MMIO and thus forbids speculation, preserves access size, + * requires strict alignment and can also force write responses to come from the + * endpoint. + */ #define pgprot_dmacoherent(prot) \ __pgprot_modify(prot, PTE_ATTRINDX_MASK, \ PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN) |