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authorRenius Chen <reniuschengl@gmail.com>2021-02-25 12:13:07 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2021-03-30 11:42:00 +0200
commitf46b54cc72bd71d1b2e620bfa00a95837078261f (patch)
treea5d1871fba9f596d766c2e3a9f72d790afc6f264
parentmmc: sdhci-esdhc-imx: validate pinctrl before use it (diff)
downloadlinux-f46b54cc72bd71d1b2e620bfa00a95837078261f.tar.xz
linux-f46b54cc72bd71d1b2e620bfa00a95837078261f.zip
mmc: sdhci-pci-gli: Enable short circuit protection mechanism of GL9755
Short circuit protection mechanism of GL9755 is disabled by HW default setting. Enable short circuit protection to prevent GL9755 from being damaged by short circuit or over current. Signed-off-by: Renius Chen <reniuschengl@gmail.com> Link: https://lore.kernel.org/r/20210225111307.62975-1-reniuschengl@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r--drivers/mmc/host/sdhci-pci-gli.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index 4a0f69b97a78..fd0939355584 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -123,6 +123,9 @@
#define PCI_GLI_9755_PLLSSC 0x68
#define PCI_GLI_9755_PLLSSC_PPM GENMASK(15, 0)
+#define PCI_GLI_9755_SerDes 0x70
+#define PCI_GLI_9755_SCP_DIS BIT(19)
+
#define GLI_MAX_TUNING_LOOP 40
/* Genesys Logic chipset */
@@ -547,6 +550,11 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
value &= ~PCI_GLI_9755_DMACLK;
pci_write_config_dword(pdev, PCI_GLI_9755_PECONF, value);
+ /* enable short circuit protection */
+ pci_read_config_dword(pdev, PCI_GLI_9755_SerDes, &value);
+ value &= ~PCI_GLI_9755_SCP_DIS;
+ pci_write_config_dword(pdev, PCI_GLI_9755_SerDes, value);
+
gl9755_wt_off(pdev);
}