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authorAlex Frid <afrid@nvidia.com>2017-07-25 12:18:40 +0200
committerStephen Boyd <sboyd@codeaurora.org>2017-09-01 03:43:38 +0200
commit2316a7a33408b6e7b24e9d2a9a7c24af9a012289 (patch)
tree0bc2dc4fd97f8927062274f8686d10bd164a5f23
parentclk: uniphier: add video input subsystem clock (diff)
downloadlinux-2316a7a33408b6e7b24e9d2a9a7c24af9a012289.tar.xz
linux-2316a7a33408b6e7b24e9d2a9a7c24af9a012289.zip
clk: Don't write error code into divider register
Add a check for error returned by divider value calculation to avoid writing error code into hw register. Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Fixes: bca9690b9426 ("clk: divider: Make generic for usage elsewhere") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r--drivers/clk/clk-divider.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 9bb472cccca6..4ed516cb7276 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -385,12 +385,14 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct clk_divider *divider = to_clk_divider(hw);
- unsigned int value;
+ int value;
unsigned long flags = 0;
u32 val;
value = divider_get_val(rate, parent_rate, divider->table,
divider->width, divider->flags);
+ if (value < 0)
+ return value;
if (divider->lock)
spin_lock_irqsave(divider->lock, flags);
@@ -403,7 +405,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
val = clk_readl(divider->reg);
val &= ~(div_mask(divider->width) << divider->shift);
}
- val |= value << divider->shift;
+ val |= (u32)value << divider->shift;
clk_writel(val, divider->reg);
if (divider->lock)