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authorLars Persson <lars.persson@axis.com>2017-08-10 14:53:51 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2017-08-22 08:54:51 +0200
commitac6b6f4531bb0d113ad8ba8c08247df793271a96 (patch)
tree773d16949f290b846b4ed344f41fda379722e0e0
parentcrypto: algif_aead - fix comment regarding memory layout (diff)
downloadlinux-ac6b6f4531bb0d113ad8ba8c08247df793271a96.tar.xz
linux-ac6b6f4531bb0d113ad8ba8c08247df793271a96.zip
dt-bindings: crypto: add ARTPEC crypto
Document the device tree bindings for the ARTPEC crypto accelerator on ARTPEC-6 and ARTPEC-7 SoCs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--Documentation/devicetree/bindings/crypto/artpec6-crypto.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt b/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt
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+++ b/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt
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+Axis crypto engine with PDMA interface.
+
+Required properties:
+- compatible : Should be one of the following strings:
+ "axis,artpec6-crypto" for the version in the Axis ARTPEC-6 SoC
+ "axis,artpec7-crypto" for the version in the Axis ARTPEC-7 SoC.
+- reg: Base address and size for the PDMA register area.
+- interrupts: Interrupt handle for the PDMA interrupt line.
+
+Example:
+
+crypto@f4264000 {
+ compatible = "axis,artpec6-crypto";
+ reg = <0xf4264000 0x1000>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+};