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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 19:56:09 +0200
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 12:53:14 +0200
commitbb102fd600d1d6c0020a4514197c0604c4a218d9 (patch)
tree54b13d3679044ac4d751746f2870175bb32d7d70
parentiio: adc: ti-adc0832: Fix alignment for DMA safety (diff)
downloadlinux-bb102fd600d1d6c0020a4514197c0604c4a218d9.tar.xz
linux-bb102fd600d1d6c0020a4514197c0604c4a218d9.zip
iio: adc: ti-adc084s021: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: 3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Mårten Lindahl <marten.lindahl@axis.com> Link: https://lore.kernel.org/r/20220508175712.647246-30-jic23@kernel.org
-rw-r--r--drivers/iio/adc/ti-adc084s021.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iio/adc/ti-adc084s021.c b/drivers/iio/adc/ti-adc084s021.c
index c9b5d9aec3dc..1f6e53832e06 100644
--- a/drivers/iio/adc/ti-adc084s021.c
+++ b/drivers/iio/adc/ti-adc084s021.c
@@ -32,10 +32,10 @@ struct adc084s021 {
s64 ts __aligned(8);
} scan;
/*
- * DMA (thus cache coherency maintenance) requires the
+ * DMA (thus cache coherency maintenance) may require the
* transfer buffers to live in their own cache line.
*/
- u16 tx_buf[4] ____cacheline_aligned;
+ u16 tx_buf[4] __aligned(IIO_DMA_MINALIGN);
__be16 rx_buf[5]; /* First 16-bits are trash */
};