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| author | Ard Biesheuvel <ardb@kernel.org> | 2024-02-14 13:29:21 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2024-02-16 13:42:40 +0100 |
| commit | 0383808e4d99ac31892655ae9dc93597eb6f1412 (patch) | |
| tree | 2027a25a96234778cebf4d9ea624f5f747af4048 /COPYING | |
| parent | arm64: mm: Add 5 level paging support to fixmap and swapper handling (diff) | |
| download | linux-0383808e4d99ac31892655ae9dc93597eb6f1412.tar.xz linux-0383808e4d99ac31892655ae9dc93597eb6f1412.zip | |
arm64: kasan: Reduce minimum shadow alignment and enable 5 level paging
Allow the KASAN init code to deal with 5 levels of paging, and relax the
requirement that the shadow region is aligned to the top level pgd_t
size. This is necessary for LPA2 based 52-bit virtual addressing, where
the KASAN shadow will never be aligned to the pgd_t size. Allowing this
also enables the 16k/48-bit case for KASAN, which is a nice bonus.
This involves some hackery to manipulate the root and next level page
tables without having to distinguish all the various configurations,
including 16k/48-bits (which has a two entry pgd_t level), and LPA2
configurations running with one translation level less on non-LPA2
hardware.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20240214122845.2033971-80-ardb+git@google.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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