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author | Thomas Gleixner <tglx@linutronix.de> | 2016-06-03 15:05:51 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2016-06-03 15:05:51 +0200 |
commit | 2eec3707a33fbf1c2e0a88ffc9fc0e465c2a59fd (patch) | |
tree | 9e47763ecd38f0ddd29f07e1ce199680304449fa /Documentation/ABI/testing/sysfs-class-cxl | |
parent | genirq: Fix missing return value in irq_destroy_ipi() (diff) | |
parent | irqchip/irq-pic32-evic: Fix bug with external interrupts. (diff) | |
download | linux-2eec3707a33fbf1c2e0a88ffc9fc0e465c2a59fd.tar.xz linux-2eec3707a33fbf1c2e0a88ffc9fc0e465c2a59fd.zip |
Merge tag 'irqchip-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Merge irqchip updates from Marc Zyngier:
- A number of embarassing buglets (GICv3, PIC32)
- A more substential errata workaround for Cavium's GICv3 ITS
(kept for post-rc1 due to its dependency on NUMA)
Diffstat (limited to 'Documentation/ABI/testing/sysfs-class-cxl')
-rw-r--r-- | Documentation/ABI/testing/sysfs-class-cxl | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-class-cxl b/Documentation/ABI/testing/sysfs-class-cxl index 7fd737eed38a..4ba0a2a61926 100644 --- a/Documentation/ABI/testing/sysfs-class-cxl +++ b/Documentation/ABI/testing/sysfs-class-cxl @@ -233,3 +233,11 @@ Description: read/write 0 = don't trust, the image may be different (default) 1 = trust that the image will not change. Users: https://github.com/ibm-capi/libcxl + +What: /sys/class/cxl/<card>/psl_timebase_synced +Date: March 2016 +Contact: linuxppc-dev@lists.ozlabs.org +Description: read only + Returns 1 if the psl timebase register is synchronized + with the core timebase register, 0 otherwise. +Users: https://github.com/ibm-capi/libcxl |