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author | Christoph Niedermaier <cniedermaier@dh-electronics.de> | 2018-11-05 09:48:35 +0100 |
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committer | Jonathan Corbet <corbet@lwn.net> | 2018-11-06 15:36:22 +0100 |
commit | 8bed5a5cfc3317217f4b4ddad8044cbdd13d5a20 (patch) | |
tree | 17192f617896cd0afc7bbd22e84d01eaaa2f01b2 /Documentation/EDID/1024x768.S | |
parent | Docs/EDID: Fixed erroneous bits of XOFFSET, XPULSE, YOFFSET and YPULSE (diff) | |
download | linux-8bed5a5cfc3317217f4b4ddad8044cbdd13d5a20.tar.xz linux-8bed5a5cfc3317217f4b4ddad8044cbdd13d5a20.zip |
Docs/EDID: Calculate CRC while building the code
The previous version made it necessary to first generate an
EDID data set without correct CRC and then to fix the CRC in
a second step. This patch adds the CRC calculation to the
makefile in such a way that a correct EDID data set is generated
in a single build step. Successfully tested with all existing
and a couple of new data sets.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Reviewed-by: Carsten Emde <C.Emde@osadl.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'Documentation/EDID/1024x768.S')
-rw-r--r-- | Documentation/EDID/1024x768.S | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/Documentation/EDID/1024x768.S b/Documentation/EDID/1024x768.S index ff4013e5fa49..4aed3f9ab88a 100644 --- a/Documentation/EDID/1024x768.S +++ b/Documentation/EDID/1024x768.S @@ -39,6 +39,5 @@ #define ESTABLISHED_TIMING2_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */ #define HSYNC_POL 0 #define VSYNC_POL 0 -#define CRC 0x55 #include "edid.S" |