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authorGuilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com>2017-09-21 21:29:01 +0200
committerPaul E. McKenney <paulmck@linux.vnet.ibm.com>2017-10-20 20:09:32 +0200
commit5692fcc671ac8a10bfd0e75d52f0259fe767b56c (patch)
tree46b532f50defd2f014896f0287074a18f52770e9 /Documentation/EDID
parentmemory-barriers.txt: Fix typo in pairing example (diff)
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doc: Rewrite confusing statement about memory barriers
The "Write (or store) memory barriers" bullet of the "Variety of memory barriers" section, calls out a sequential order of stores, which is confusing since sequential ordering is not guaranteed. This commit therefore rewords to avoid mentioning a sequence of stores to clarify the intent. Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
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