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| author | Mark Rutland <mark.rutland@arm.com> | 2015-09-07 11:49:03 +0200 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2015-09-17 21:36:35 +0200 |
| commit | dc4dae00d82fedcd7a632f786f9f76c1f7f929a5 (patch) | |
| tree | 5ba1bb42e2fbd23e6c895ea815e64150535b5b52 /Documentation/Intel-IOMMU.txt | |
| parent | of: add vendor prefix for Socionext Inc. (diff) | |
| download | linux-dc4dae00d82fedcd7a632f786f9f76c1f7f929a5.tar.xz linux-dc4dae00d82fedcd7a632f786f9f76c1f7f929a5.zip | |
Docs: dt: add #msi-cells to GICv3 ITS binding
The GICv3 ITS uses sideband master identification data (known as a
DeviceID) to identify which master wrote to a doorbell, and this data is
used to determine how to react in response to the write.
Commit 1e6db000482fa65a ("irqchip/gicv3-its: Add platform MSI support")
added support per this binding, but failed to update the documentation.
This patch fixes the documentation.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/Intel-IOMMU.txt')
0 files changed, 0 insertions, 0 deletions