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author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-18 20:07:32 +0100 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-18 20:07:32 +0100 |
commit | 5e725d112e1a54c2611d5dffd124a79415d0f0de (patch) | |
tree | 3ab2bd78733e0558c2bd6556ed25f11f7bddfc0e /Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst | |
parent | Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm6... (diff) | |
parent | kvm: initialize all of the kvm_debugregs structure before sending it to users... (diff) | |
download | linux-5e725d112e1a54c2611d5dffd124a79415d0f0de.tar.xz linux-5e725d112e1a54c2611d5dffd124a79415d0f0de.zip |
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm/x86 fixes from Paolo Bonzini:
- zero all padding for KVM_GET_DEBUGREGS
- fix rST warning
- disable vPMU support on hybrid CPUs
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
kvm: initialize all of the kvm_debugregs structure before sending it to userspace
perf/x86: Refuse to export capabilities for hybrid PMUs
KVM: x86/pmu: Disable vPMU support on hybrid CPUs (host PMUs)
Documentation/hw-vuln: Fix rST warning
Diffstat (limited to 'Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst')
-rw-r--r-- | Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst b/Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst index ec6e9f5bcf9e..875616d675fe 100644 --- a/Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst +++ b/Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst @@ -88,5 +88,4 @@ capability to override those interceptions, but since this is not common, the mitigation that covers this path is not enabled by default. The mitigation for the KVM_CAP_X86_DISABLE_EXITS capability can be turned on -using the boolean module parameter mitigate_smt_rsb, e.g.: - kvm.mitigate_smt_rsb=1 +using the boolean module parameter mitigate_smt_rsb, e.g. ``kvm.mitigate_smt_rsb=1``. |