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authorDing Tianhong <dingtianhong@huawei.com>2017-02-06 17:47:39 +0100
committerDaniel Lezcano <daniel.lezcano@linaro.org>2017-02-08 00:13:57 +0100
commit729e55225b1f6225ee7a2a358d5141a3264627c4 (patch)
tree10d8a96da7e1b3d6a3687314aa77c35bf27b8397 /Documentation/admin-guide
parentclocksource/drivers/ostm: Add renesas-ostm timer driver (diff)
downloadlinux-729e55225b1f6225ee7a2a358d5141a3264627c4.tar.xz
linux-729e55225b1f6225ee7a2a358d5141a3264627c4.zip
clocksource/drivers/arm_arch_timer: Add dt binding for hisilicon-161010101 erratum
This erratum describes a bug in logic outside the core, so MIDR can't be used to identify its presence, and reading an SoC-specific revision register from common arch timer code would be awkward. So, describe it in the device tree. Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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