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| author | Tony Luck <tony.luck@intel.com> | 2024-06-11 22:48:14 +0200 |
|---|---|---|
| committer | Jonathan Corbet <corbet@lwn.net> | 2024-06-18 00:28:08 +0200 |
| commit | f77afc2796d56ece87beb13c093f3d7ee008c94e (patch) | |
| tree | 60da6902339f68a6ee3163258a7ec968b81b1677 /Documentation/arch/x86 | |
| parent | Documentation: Remove unused "nps_mtm_hs_ctr" from kernel-parameters.txt (diff) | |
| download | linux-f77afc2796d56ece87beb13c093f3d7ee008c94e.tar.xz linux-f77afc2796d56ece87beb13c093f3d7ee008c94e.zip | |
Documentation/x86: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model
so "_FAM6" is no longer used in the #define names.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Link: https://lore.kernel.org/r/20240611204814.353821-1-tony.luck@intel.com
Diffstat (limited to 'Documentation/arch/x86')
| -rw-r--r-- | Documentation/arch/x86/cpuinfo.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/arch/x86/cpuinfo.rst b/Documentation/arch/x86/cpuinfo.rst index 8895784d4784..6ef426a52cdc 100644 --- a/Documentation/arch/x86/cpuinfo.rst +++ b/Documentation/arch/x86/cpuinfo.rst @@ -112,7 +112,7 @@ conditions are met, the features are enabled by the set_cpu_cap or setup_force_cpu_cap macros. For example, if bit 5 is set in MSR_IA32_CORE_CAPS, the feature X86_FEATURE_SPLIT_LOCK_DETECT will be enabled and "split_lock_detect" will be displayed. The flag "ring3mwait" will be -displayed only when running on INTEL_FAM6_XEON_PHI_[KNL|KNM] processors. +displayed only when running on INTEL_XEON_PHI_[KNL|KNM] processors. d: Flags can represent purely software features. ------------------------------------------------ |