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author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-10-09 22:24:01 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-10-09 22:24:01 +0200 |
commit | 2e64066dab157ffcd0e9ec2ff631862e6e222876 (patch) | |
tree | 5037e25ae6e845e67c4a23f94192bdaeef883f83 /Documentation/arm64/cpu-feature-registers.rst | |
parent | Merge tag 'microblaze-v6.1' of git://git.monstr.eu/linux-2.6-microblaze (diff) | |
parent | riscv: enable THP_SWAP for RV64 (diff) | |
download | linux-2e64066dab157ffcd0e9ec2ff631862e6e222876.tar.xz linux-2e64066dab157ffcd0e9ec2ff631862e6e222876.zip |
Merge tag 'riscv-for-linus-6.1-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt:
- Improvements to the CPU topology subsystem, which fix some issues
where RISC-V would report bad topology information.
- The default NR_CPUS has increased to XLEN, and the maximum
configurable value is 512.
- The CD-ROM filesystems have been enabled in the defconfig.
- Support for THP_SWAP has been added for rv64 systems.
There are also a handful of cleanups and fixes throughout the tree.
* tag 'riscv-for-linus-6.1-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: enable THP_SWAP for RV64
RISC-V: Print SSTC in canonical order
riscv: compat: s/failed/unsupported if compat mode isn't supported
RISC-V: Increase range and default value of NR_CPUS
cpuidle: riscv-sbi: Fix CPU_PM_CPU_IDLE_ENTER_xyz() macro usage
perf: RISC-V: throttle perf events
perf: RISC-V: exclude invalid pmu counters from SBI calls
riscv: enable CD-ROM file systems in defconfig
riscv: topology: fix default topology reporting
arm64: topology: move store_cpu_topology() to shared code
Diffstat (limited to 'Documentation/arm64/cpu-feature-registers.rst')
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