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| author | Marc Zyngier <maz@kernel.org> | 2019-07-30 12:15:31 +0200 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-10-26 11:44:49 +0200 |
| commit | bd227553ad5077f21ddb382dcd910ba46181805a (patch) | |
| tree | 0dea72dba7f8330cb9b9d40f2b33a9bd56278d1b /Documentation/arm64/silicon-errata.rst | |
| parent | arm64: KVM: Disable EL1 PTW when invalidating S2 TLBs (diff) | |
| download | linux-bd227553ad5077f21ddb382dcd910ba46181805a.tar.xz linux-bd227553ad5077f21ddb382dcd910ba46181805a.zip | |
arm64: KVM: Prevent speculative S1 PTW when restoring vcpu context
When handling erratum 1319367, we must ensure that the page table
walker cannot parse the S1 page tables while the guest is in an
inconsistent state. This is done as follows:
On guest entry:
- TCR_EL1.EPD{0,1} are set, ensuring that no PTW can occur
- all system registers are restored, except for TCR_EL1 and SCTLR_EL1
- stage-2 is restored
- SCTLR_EL1 and TCR_EL1 are restored
On guest exit:
- SCTLR_EL1.M and TCR_EL1.EPD{0,1} are set, ensuring that no PTW can occur
- stage-2 is disabled
- All host system registers are restored
Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'Documentation/arm64/silicon-errata.rst')
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