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author | Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> | 2016-03-04 22:56:09 +0100 |
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committer | Will Deacon <will.deacon@arm.com> | 2016-05-03 19:23:01 +0200 |
commit | 1bd37a6835bef0ecd2138cb42f9088fd890f9939 (patch) | |
tree | c2b9cb2eb6d21b7d12d7a846e177d67fd7638d32 /Documentation/arm64 | |
parent | iommu/arm-smmu: Add support for 16 bit VMID (diff) | |
download | linux-1bd37a6835bef0ecd2138cb42f9088fd890f9939.tar.xz linux-1bd37a6835bef0ecd2138cb42f9088fd890f9939.zip |
iommu/arm-smmu: Workaround for ThunderX erratum #27704
Due to erratum #27704, the CN88xx SMMUv2 implementation supports only
shared ASID and VMID numberspaces.
This patch ensures that ASID and VMIDs are unique across all SMMU
instances on affected Cavium systems.
Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
Signed-off-by: Akula Geethasowjanya <Geethasowjanya.Akula@caviumnetworks.com>
[will: commit message, comments and formatting]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'Documentation/arm64')
-rw-r--r-- | Documentation/arm64/silicon-errata.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt index ba4b6acfc545..806f91cdd45d 100644 --- a/Documentation/arm64/silicon-errata.txt +++ b/Documentation/arm64/silicon-errata.txt @@ -57,3 +57,4 @@ stable kernels. | Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 | | Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 | | Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 | +| Cavium | ThunderX SMMUv2 | #27704 | N/A | |