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| author | Marc Zyngier <marc.zyngier@arm.com> | 2019-09-13 11:57:50 +0200 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2019-10-08 13:25:25 +0200 |
| commit | 603afdc9438ac546181e843f807253d75d3dbc45 (patch) | |
| tree | 3b6e284befb8384f0babee6d8afff2f6da9cb191 /Documentation/arm64 | |
| parent | arm64: Avoid Cavium TX2 erratum 219 when switching TTBR (diff) | |
| download | linux-603afdc9438ac546181e843f807253d75d3dbc45.tar.xz linux-603afdc9438ac546181e843f807253d75d3dbc45.zip | |
arm64: Allow CAVIUM_TX2_ERRATUM_219 to be selected
Allow the user to select the workaround for TX2-219, and update
the silicon-errata.rst file to reflect this.
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/arm64')
| -rw-r--r-- | Documentation/arm64/silicon-errata.rst | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index 17ea3fecddaa..ab7ed2fd072f 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -107,6 +107,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Cavium | ThunderX2 SMMUv3| #126 | N/A | +----------------+-----------------+-----------------+-----------------------------+ +| Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 | ++----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 | +----------------+-----------------+-----------------+-----------------------------+ |