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| author | Keerthy <j-keerthy@ti.com> | 2015-04-22 14:51:42 +0200 |
|---|---|---|
| committer | Eduardo Valentin <edubezval@gmail.com> | 2015-05-09 03:02:29 +0200 |
| commit | e9a90d046b9c9fe8f7c8efefe7b0e64c3c0daa8f (patch) | |
| tree | 5892eedab25e84bf4c96d481a5a8165ecdeb2cec /Documentation/arm64 | |
| parent | thermal: ti-soc-thermal: dra7: Implement Workaround for Errata i814 (diff) | |
| download | linux-e9a90d046b9c9fe8f7c8efefe7b0e64c3c0daa8f.tar.xz linux-e9a90d046b9c9fe8f7c8efefe7b0e64c3c0daa8f.zip | |
thermal: ti-soc-thermal: OMAP5: Implement Workaround for Errata i813
DESCRIPTION
Spurious Thermal Alert: Talert can happen randomly while the device remains
under the temperature limit defined for this event to trig. This spurious
event is caused by a incorrect re-synchronization between clock domains.
The comparison between configured threshold and current temperature value
can happen while the value is transitioning (metastable), thus causing
inappropriate event generation. No spurious event occurs as long as the
threshold value stays unchanged. Spurious event can be generated while a
thermal alert threshold is modified in
CONTROL_BANDGAP_THRESHOLD_MPU/GPU/CORE/DSPEVE/IVA_n.
WORKAROUND
Spurious event generation can be avoided by performing following sequence
when the threshold is modified:
1. Mask the hot/cold events at the thermal IP level.
2. Modify Threshold.
3. Unmask the hot/cold events at the thermal IP level.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'Documentation/arm64')
0 files changed, 0 insertions, 0 deletions