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authorDave Carroll <david.carroll@microsemi.com>2019-03-22 19:16:03 +0100
committerMartin K. Petersen <martin.petersen@oracle.com>2019-03-26 03:19:01 +0100
commitb6554cfe09e1f610aed7d57164ab7760be57acd9 (patch)
treef55eeb54f1b6b926bfaab5eb9c7e8f2f7ab814ff /Documentation/block
parentscsi: mpt3sas: Fix kernel panic during expander reset (diff)
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scsi: aacraid: Insure we don't access PCIe space during AER/EEH
There are a few windows during AER/EEH when we can access PCIe I/O mapped registers. This will harden the access to insure we do not allow PCIe access during errors Signed-off-by: Dave Carroll <david.carroll@microsemi.com> Reviewed-by: Sagar Biradar <sagar.biradar@microchip.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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