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authorDave Thaler <dthaler1968@googlemail.com>2024-01-19 00:29:54 +0100
committerAlexei Starovoitov <ast@kernel.org>2024-01-24 00:10:08 +0100
commit20e109ea9842158a153b24ef42ec5cc3d44e9485 (patch)
treeba89b7c2fba858d3ad06c588e2cf7c5621ca0a84 /Documentation/bpf
parentbpf: Define struct bpf_tcp_req_attrs when CONFIG_SYN_COOKIES=n. (diff)
downloadlinux-20e109ea9842158a153b24ef42ec5cc3d44e9485.tar.xz
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bpf, docs: Clarify that MOVSX is only for BPF_X not BPF_K
Per discussion on the mailing list at https://mailarchive.ietf.org/arch/msg/bpf/uQiqhURdtxV_ZQOTgjCdm-seh74/ the MOVSX operation is only defined to support register extension. The document didn't previously state this and incorrectly implied that one could use an immediate value. Signed-off-by: Dave Thaler <dthaler1968@gmail.com> Acked-by: David Vernet <void@manifault.com> Acked-by: Yonghong Song <yonghong.song@linux.dev> Link: https://lore.kernel.org/r/20240118232954.27206-1-dthaler1968@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Diffstat (limited to 'Documentation/bpf')
-rw-r--r--Documentation/bpf/standardization/instruction-set.rst3
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index eb0f234a8001..d17a96c6254f 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -317,7 +317,8 @@ The ``BPF_MOVSX`` instruction does a move operation with sign extension.
``BPF_ALU | BPF_MOVSX`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into 32
bit operands, and zeroes the remaining upper 32 bits.
``BPF_ALU64 | BPF_MOVSX`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit
-operands into 64 bit operands.
+operands into 64 bit operands. Unlike other arithmetic instructions,
+``BPF_MOVSX`` is only defined for register source operands (``BPF_X``).
Shift operations use a mask of 0x3F (63) for 64-bit operations and 0x1F (31)
for 32-bit operations.