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| author | Tuomas Tynkkynen <ttynkkynen@nvidia.com> | 2015-05-13 16:58:41 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-07-16 10:39:45 +0200 |
| commit | 62a8a094b0e1de782a1b3dcb5e42a7d44379e583 (patch) | |
| tree | 354de9066b07a1c4c3eb0fb7f727023b1a57b860 /Documentation/clk.txt | |
| parent | clk: tegra: Add DFLL DVCO reset control for Tegra124 (diff) | |
| download | linux-62a8a094b0e1de782a1b3dcb5e42a7d44379e583.tar.xz linux-62a8a094b0e1de782a1b3dcb5e42a7d44379e583.zip | |
clk: tegra: Add Tegra124 DFLL clocksource platform driver
Add basic platform driver support for the fast CPU cluster DFLL
clocksource found on Tegra124 SoCs. This small driver selects the
appropriate Tegra124-specific characterization data and integration
code. It relies on the DFLL common code to do most of the work.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
[treding@nvidia.com: move setup code into ->probe()]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/clk.txt')
0 files changed, 0 insertions, 0 deletions