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| author | Al Viro <viro@zeniv.linux.org.uk> | 2016-05-11 06:00:29 +0200 |
|---|---|---|
| committer | Al Viro <viro@zeniv.linux.org.uk> | 2016-05-11 06:00:29 +0200 |
| commit | e4d35be584be88a3db3fa5635a97c62a2ec5aafe (patch) | |
| tree | fc22a7fb65697306edd71411959ccee6df60c64d /Documentation/devicetree/bindings/arc | |
| parent | get_rock_ridge_filename(): handle malformed NM entries (diff) | |
| parent | ovl: ignore permissions on underlying lookup (diff) | |
| download | linux-e4d35be584be88a3db3fa5635a97c62a2ec5aafe.tar.xz linux-e4d35be584be88a3db3fa5635a97c62a2ec5aafe.zip | |
Merge branch 'ovl-fixes' into for-linus
Diffstat (limited to 'Documentation/devicetree/bindings/arc')
| -rw-r--r-- | Documentation/devicetree/bindings/arc/archs-pct.txt | 2 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/arc/pct.txt | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/arc/archs-pct.txt b/Documentation/devicetree/bindings/arc/archs-pct.txt index 1ae98b87c640..e4b9dcee6d41 100644 --- a/Documentation/devicetree/bindings/arc/archs-pct.txt +++ b/Documentation/devicetree/bindings/arc/archs-pct.txt @@ -2,7 +2,7 @@ The ARC HS can be configured with a pipeline performance monitor for counting CPU and cache events like cache misses and hits. Like conventional PCT there -are 100+ hardware conditions dynamically mapped to upto 32 counters. +are 100+ hardware conditions dynamically mapped to up to 32 counters. It also supports overflow interrupts. Required properties: diff --git a/Documentation/devicetree/bindings/arc/pct.txt b/Documentation/devicetree/bindings/arc/pct.txt index 7b9588444f20..4e874d9a38a6 100644 --- a/Documentation/devicetree/bindings/arc/pct.txt +++ b/Documentation/devicetree/bindings/arc/pct.txt @@ -2,7 +2,7 @@ The ARC700 can be configured with a pipeline performance monitor for counting CPU and cache events like cache misses and hits. Like conventional PCT there -are 100+ hardware conditions dynamically mapped to upto 32 counters +are 100+ hardware conditions dynamically mapped to up to 32 counters Note that: * The ARC 700 PCT does not support interrupts; although HW events may be |