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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2016-06-08 15:16:49 +0200
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>2017-12-31 15:50:00 +0100
commit296cc300bd91c13c51f9f0efa7710392532be0b5 (patch)
treef0c7aacbb5a38d79377447f246c3a5d14df279b5 /Documentation/devicetree/bindings/arm/atmel-at91.txt
parentARM: dts: at91: Remove leading 0x and 0s from bindings notation (diff)
downloadlinux-296cc300bd91c13c51f9f0efa7710392532be0b5.tar.xz
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ARM: at91: Document new TCB bindings
The current binding for the TCB is not flexible enough for some use cases and prevents proper utilization of all the channels. Acked-by: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/atmel-at91.txt')
-rw-r--r--Documentation/devicetree/bindings/arm/atmel-at91.txt32
1 files changed, 0 insertions, 32 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 91cb8e4f2a4f..31220b54d85d 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -90,38 +90,6 @@ System Timer (ST) required properties:
Its subnodes can be:
- watchdog: compatible should be "atmel,at91rm9200-wdt"
-TC/TCLIB Timer required properties:
-- compatible: Should be "atmel,<chip>-tcb".
- <chip> can be "at91rm9200" or "at91sam9x5"
-- reg: Should contain registers location and length
-- interrupts: Should contain all interrupts for the TC block
- Note that you can specify several interrupt cells if the TC
- block has one interrupt per channel.
-- clock-names: tuple listing input clock names.
- Required elements: "t0_clk", "slow_clk"
- Optional elements: "t1_clk", "t2_clk"
-- clocks: phandles to input clocks.
-
-Examples:
-
-One interrupt per TC block:
- tcb0: timer@fff7c000 {
- compatible = "atmel,at91rm9200-tcb";
- reg = <0xfff7c000 0x100>;
- interrupts = <18 4>;
- clocks = <&tcb0_clk>;
- clock-names = "t0_clk";
- };
-
-One interrupt per TC channel in a TC block:
- tcb1: timer@fffdc000 {
- compatible = "atmel,at91rm9200-tcb";
- reg = <0xfffdc000 0x100>;
- interrupts = <26 4 27 4 28 4>;
- clocks = <&tcb1_clk>;
- clock-names = "t0_clk";
- };
-
RSTC Reset Controller required properties:
- compatible: Should be "atmel,<chip>-rstc".
<chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"