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authorChao Xie <xiechao.mail@gmail.com>2012-07-31 08:13:14 +0200
committerHaojian Zhuang <haojian.zhuang@gmail.com>2012-08-16 10:16:50 +0200
commitc2b7e05c753156dfba3240c59c400d557c5c8746 (patch)
tree9d906c9594730b1d1305c1e2773dac163ea28984 /Documentation/devicetree/bindings/arm/mrvl
parentARM: mmp&dove: modify tauros2_init call (diff)
downloadlinux-c2b7e05c753156dfba3240c59c400d557c5c8746.tar.xz
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ARM: cache: add dt support for tauros2 cache
Signed-off-by: Chao Xie <xiechao.mail@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/mrvl')
-rw-r--r--Documentation/devicetree/bindings/arm/mrvl/tauros2.txt17
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diff --git a/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt b/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt
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+++ b/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt
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+* Marvell Tauros2 Cache
+
+Required properties:
+- compatible : Should be "marvell,tauros2-cache".
+- marvell,tauros2-cache-features : Specify the features supported for the
+ tauros2 cache.
+ The features including
+ CACHE_TAUROS2_PREFETCH_ON (1 << 0)
+ CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1)
+ The definition can be found at
+ arch/arm/include/asm/hardware/cache-tauros2.h
+
+Example:
+ L2: l2-cache {
+ compatible = "marvell,tauros2-cache";
+ marvell,tauros2-cache-features = <0x3>;
+ };