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authorOlof Johansson <olof@lixom.net>2015-01-23 23:01:47 +0100
committerOlof Johansson <olof@lixom.net>2015-01-23 23:01:47 +0100
commit0dcfd9e33da3d61510bb10ab74df98c02122b955 (patch)
tree1d9a4d823bb983261ae718d2157468f089373952 /Documentation/devicetree/bindings/arm
parentMerge tag 'renesas-soc3-for-v3.20' of git://git.kernel.org/pub/scm/linux/kern... (diff)
parentARM: rockchip: remove cpu-core name from machine name (diff)
downloadlinux-0dcfd9e33da3d61510bb10ab74df98c02122b955.tar.xz
linux-0dcfd9e33da3d61510bb10ab74df98c02122b955.zip
Merge tag 'v3.20-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Merge "ARM: rockchip: soc updates for v3.20" from Heiko Stübner: SoC parts of basic suspend support and removal of Cortex-A9 reference from the machine name. * tag 'v3.20-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: rockchip: remove cpu-core name from machine name ARM: rockchip: Add pmu-sram binding ARM: rockchip: add suspend and resume for RK3288 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt16
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diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt b/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
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+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
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+Rockchip SRAM for pmu:
+------------------------------
+
+The sram of pmu is used to store the function of resume from maskrom(the 1st
+level loader). This is a common use of the "pmu-sram" because it keeps power
+even in low power states in the system.
+
+Required node properties:
+- compatible : should be "rockchip,rk3288-pmu-sram"
+- reg : physical base address and the size of the registers window
+
+Example:
+ sram@ff720000 {
+ compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
+ reg = <0xff720000 0x1000>;
+ };