diff options
author | Yu Tu <yu.tu@amlogic.com> | 2023-09-04 09:55:01 +0200 |
---|---|---|
committer | Jerome Brunet <jbrunet@baylibre.com> | 2023-09-27 10:54:24 +0200 |
commit | 923a77a2e18001f290432b96cb71f68b3423296d (patch) | |
tree | f9353619e1cdef7784b8dc3a16e4d116b8ac0a5e /Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml | |
parent | Linux 6.6-rc1 (diff) | |
download | linux-923a77a2e18001f290432b96cb71f68b3423296d.tar.xz linux-923a77a2e18001f290432b96cb71f68b3423296d.zip |
dt-bindings: clock: document Amlogic S4 SoC PLL clock controller
Add the S4 PLL clock controller dt-bindings in the S4 SoC family.
Signed-off-by: Yu Tu <yu.tu@amlogic.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230904075504.23263-2-yu.tu@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml new file mode 100644 index 000000000000..d8932ec26ca8 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022-2023 Amlogic, Inc. All rights reserved +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/amlogic,s4-pll-clkc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic S4 PLL Clock Controller + +maintainers: + - Yu Tu <yu.tu@amlogic.com> + +properties: + compatible: + const: amlogic,s4-pll-clkc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: xtal + + "#clock-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + +additionalProperties: false + +examples: + - | + clkc_pll: clock-controller@fe008000 { + compatible = "amlogic,s4-pll-clkc"; + reg = <0xfe008000 0x1e8>; + clocks = <&xtal>; + clock-names = "xtal"; + #clock-cells = <1>; + }; + +... |