diff options
author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2022-11-15 16:58:04 +0100 |
---|---|---|
committer | Bjorn Andersson <andersson@kernel.org> | 2022-11-15 17:46:31 +0100 |
commit | 9285e61a5670657cb0a0f0f4e5c5a320dd18b471 (patch) | |
tree | 7f2e13fae4d8bfe118501c166116835046123468 /Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml | |
parent | clk: qcom: Add SC8280XP display clock controller (diff) | |
download | linux-9285e61a5670657cb0a0f0f4e5c5a320dd18b471.tar.xz linux-9285e61a5670657cb0a0f0f4e5c5a320dd18b471.zip |
dt-bindings: clock: add QCOM SM6375 display clock
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM6375 SoC.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115155808.10899-1-konrad.dybcio@linaro.org
Diffstat (limited to 'Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml new file mode 100644 index 000000000000..183b1c75dbdf --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sm6375-dispcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller on SM6375 + +maintainers: + - Konrad Dybcio <konrad.dybcio@linaro.org> + +description: | + Qualcomm display clock control module provides the clocks, resets and power + domains on SM6375. + + See also:: include/dt-bindings/clock/qcom,dispcc-sm6375.h + +allOf: + - $ref: qcom,gcc.yaml# + +properties: + compatible: + const: qcom,sm6375-dispcc + + clocks: + items: + - description: Board XO source + - description: GPLL0 source from GCC + - description: Byte clock from DSI PHY + - description: Pixel clock from DSI PHY + +required: + - compatible + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,sm6375-gcc.h> + #include <dt-bindings/clock/qcom,rpmh.h> + + clock-controller@5f00000 { + compatible = "qcom,sm6375-dispcc"; + reg = <0x05f00000 0x20000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_DISP_GPLL0_CLK_SRC>, + <&dsi_phy 0>, + <&dsi_phy 1>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... |