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author | Yoshinori Sato <ysato@users.sourceforge.jp> | 2015-05-08 16:31:57 +0200 |
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committer | Yoshinori Sato <ysato@users.sourceforge.jp> | 2015-06-23 06:35:55 +0200 |
commit | 7b5bb891a6e44bd18bd8661ede2e09ccae258ef5 (patch) | |
tree | bf056a4137d4c3cc58e11107c2bdc7393df13ff2 /Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt | |
parent | h8300: Build scripts (diff) | |
download | linux-7b5bb891a6e44bd18bd8661ede2e09ccae258ef5.tar.xz linux-7b5bb891a6e44bd18bd8661ede2e09ccae258ef5.zip |
h8300: clock driver
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt')
-rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt b/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt new file mode 100644 index 000000000000..500cdadbceb7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt @@ -0,0 +1,23 @@ +Renesas H8S2678 PLL clock + +This device is Clock multiplyer + +Required Properties: + + - compatible: Must be "renesas,h8s2678-pll-clock" + + - clocks: Reference to the parent clocks + + - #clock-cells: Must be 0 + + - reg: Two rate selector (Multiply / Divide) register address + +Example +------- + + pllclk: pllclk { + compatible = "renesas,h8s2678-pll-clock"; + clocks = <&xclk>; + #clock-cells = <0>; + reg = <0xfee03b 2>, <0xfee045 2>; + }; |