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authorStephen Boyd <sboyd@codeaurora.org>2016-08-19 21:51:14 +0200
committerStephen Boyd <sboyd@codeaurora.org>2016-08-19 21:51:14 +0200
commit43d6912417011ea52ee8c271ec2bf07cc98a98b9 (patch)
treef705c95d08a80a282a46c723855503dfcacce59d /Documentation/devicetree/bindings/clock
parentreset: mediatek: Add MT2701 reset controller dt-binding file (diff)
parentclk: meson: Add GXBB AO Clock and Reset controller driver (diff)
downloadlinux-43d6912417011ea52ee8c271ec2bf07cc98a98b9.tar.xz
linux-43d6912417011ea52ee8c271ec2bf07cc98a98b9.zip
Merge branch 'clk-meson-gxbb-ao' into clk-next
* clk-meson-gxbb-ao: clk: meson: Add GXBB AO Clock and Reset controller driver dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt45
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diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt
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+* Amlogic GXBB AO Clock and Reset Unit
+
+The Amlogic GXBB AO clock controller generates and supplies clock to various
+controllers within the Always-On part of the SoC.
+
+Required Properties:
+
+- compatible: should be "amlogic,gxbb-aoclkc"
+- reg: physical base address of the clock controller and length of memory
+ mapped region.
+
+- #clock-cells: should be 1.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in the dt-bindings/clock/gxbb-aoclkc.h header and can be
+used in device tree sources.
+
+- #reset-cells: should be 1.
+
+Each reset is assigned an identifier and client nodes can use this identifier
+to specify the reset which they consume. All available resets are defined as
+preprocessor macros in the dt-bindings/reset/gxbb-aoclkc.h header and can be
+used in device tree sources.
+
+Example: AO Clock controller node:
+
+ clkc_AO: clock-controller@040 {
+ compatible = "amlogic,gxbb-aoclkc";
+ reg = <0x0 0x040 0x0 0x4>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+Example: UART controller node that consumes the clock and reset generated
+ by the clock controller:
+
+ uart_AO: serial@4c0 {
+ compatible = "amlogic,meson-uart";
+ reg = <0x4c0 0x14>;
+ interrupts = <0 90 1>;
+ clocks = <&clkc_AO CLKID_AO_UART1>;
+ resets = <&clkc_AO RESET_AO_UART1>;
+ status = "disabled";
+ };