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authorStephen Boyd <sboyd@codeaurora.org>2015-10-12 20:44:49 +0200
committerStephen Boyd <sboyd@codeaurora.org>2015-10-12 20:44:49 +0200
commit67d7188afe23e4b1b82ee6fed35c14387f169f74 (patch)
treeec3fe1c511b34c89626745b08bbd46c4c6d7a8a4 /Documentation/devicetree/bindings/clock
parentclk: qcom: create virtual child device for TSENS (diff)
parentclk: bcm2835: Add support for programming the audio domain clocks (diff)
downloadlinux-67d7188afe23e4b1b82ee6fed35c14387f169f74.tar.xz
linux-67d7188afe23e4b1b82ee6fed35c14387f169f74.zip
Merge branch 'clk-bcm2835' into clk-next
* clk-bcm2835: clk: bcm2835: Add support for programming the audio domain clocks clk: bcm2835: Add binding docs for the new platform clock driver. clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt45
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diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
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+Broadcom BCM2835 CPRMAN clocks
+
+This binding uses the common clock binding:
+ Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The CPRMAN clock controller generates clocks in the audio power domain
+of the BCM2835. There is a level of PLLs deriving from an external
+oscillator, a level of PLL dividers that produce channels off of the
+few PLLs, and a level of mostly-generic clock generators sourcing from
+the PLL channels. Most other hardware components source from the
+clock generators, but a few (like the ARM or HDMI) will source from
+the PLL dividers directly.
+
+Required properties:
+- compatible: Should be "brcm,bcm2835-cprman"
+- #clock-cells: Should be <1>. The permitted clock-specifier values can be
+ found in include/dt-bindings/clock/bcm2835.h
+- reg: Specifies base physical address and size of the registers
+- clocks: The external oscillator clock phandle
+
+Example:
+
+ clk_osc: clock@3 {
+ compatible = "fixed-clock";
+ reg = <3>;
+ #clock-cells = <0>;
+ clock-output-names = "osc";
+ clock-frequency = <19200000>;
+ };
+
+ clocks: cprman@7e101000 {
+ compatible = "brcm,bcm2835-cprman";
+ #clock-cells = <1>;
+ reg = <0x7e101000 0x2000>;
+ clocks = <&clk_osc>;
+ };
+
+ i2c0: i2c@7e205000 {
+ compatible = "brcm,bcm2835-i2c";
+ reg = <0x7e205000 0x1000>;
+ interrupts = <2 21>;
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };