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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2023-09-29 07:38:59 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-10-05 11:25:53 +0200 |
| commit | e372aee8c24957cbcb55d93b14ba386096497bca (patch) | |
| tree | a15fed93454dd399fecbc14c7eae0cc8514ab96a /Documentation/devicetree/bindings/clock | |
| parent | Linux 6.6-rc1 (diff) | |
| download | linux-e372aee8c24957cbcb55d93b14ba386096497bca.tar.xz linux-e372aee8c24957cbcb55d93b14ba386096497bca.zip | |
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC
Add documentation for the RZ/G3S CPG. The RZ/G3S CPG module is almost
identical to the one available in RZ/G2{L,UL}, the exception being some
core clocks as follows:
- The SD clock is composed of a mux and a divider, and the divider
has some limitations (div = 1 cannot be set if mux rate is 800MHz),
- There are 3 SD clocks,
- The OCTA and TSU clocks are specific to RZ/G3S,
- PLL1/4/6 are specific to RZ/G3S with its own computation formula.
Even with this RZ/G3S could use the same bindings as RZ/G2L.
Along with documentation bindings for the RZ/G3S (R9A08G045) Clock Pulse
Generator (CPG) core clocks, module clocks and resets were added.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-13-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml index fe2fba18ae84..80a8c7114c31 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml @@ -27,6 +27,7 @@ properties: - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} and RZ/Five - renesas,r9a07g044-cpg # RZ/G2{L,LC} - renesas,r9a07g054-cpg # RZ/V2L + - renesas,r9a08g045-cpg # RZ/G3S - renesas,r9a09g011-cpg # RZ/V2M reg: |