diff options
| author | André Draszik <andre.draszik@linaro.org> | 2024-02-01 17:11:38 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-02-07 16:27:13 +0100 |
| commit | 455061eb32434d5db11836a4de72ea2f4bdf61c8 (patch) | |
| tree | 9d64626c102b2e87c522e735fe13c02eaa2ad94a /Documentation/devicetree/bindings/clock | |
| parent | dt-bindings: clock: exynos850: Add PDMA clocks (diff) | |
| download | linux-455061eb32434d5db11836a4de72ea2f4bdf61c8.tar.xz linux-455061eb32434d5db11836a4de72ea2f4bdf61c8.zip | |
dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
Add dt-schema documentation and clock IDs for the Connectivity
Peripheral 1 (PERIC1) clock management unit.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/google,gs101-clock.yaml | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml index b1202a4f6593..4a74d19cf488 100644 --- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml @@ -31,6 +31,7 @@ properties: - google,gs101-cmu-apm - google,gs101-cmu-misc - google,gs101-cmu-peric0 + - google,gs101-cmu-peric1 clocks: minItems: 1 @@ -93,15 +94,17 @@ allOf: properties: compatible: contains: - const: google,gs101-cmu-peric0 + enum: + - google,gs101-cmu-peric0 + - google,gs101-cmu-peric1 then: properties: clocks: items: - description: External reference clock (24.576 MHz) - - description: Connectivity Peripheral 0 bus clock (from CMU_TOP) - - description: Connectivity Peripheral 0 IP clock (from CMU_TOP) + - description: Connectivity Peripheral 0/1 bus clock (from CMU_TOP) + - description: Connectivity Peripheral 0/1 IP clock (from CMU_TOP) clock-names: items: |