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authorYakir Yang <ykk@rock-chips.com>2016-06-29 11:16:05 +0200
committerYakir Yang <ykk@rock-chips.com>2016-07-05 15:53:41 +0200
commitdc1c93bef4690f7262bc10cf75a74564b477224d (patch)
tree805e39b55e7e8cf4de163e0b2de73f171cb586ac /Documentation/devicetree/bindings/display
parentdrm/bridge: analogix_dp: fix no drm hpd event when panel plug in (diff)
downloadlinux-dc1c93bef4690f7262bc10cf75a74564b477224d.tar.xz
linux-dc1c93bef4690f7262bc10cf75a74564b477224d.zip
drm/rockchip: analogix_dp: introduce the pclk for grf
For RK3399's GRF module, if we want to operate the graphic related grf registers, we need to enable the pclk_vio_grf which supply power for VIO GRF IOs, so it's better to introduce an optional grf clock in driver. Signed-off-by: Yakir Yang <ykk@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Diffstat (limited to 'Documentation/devicetree/bindings/display')
-rw-r--r--Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 726c94502a2a..0b39256c00ae 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -28,6 +28,12 @@ Required properties:
Port 0: contained 2 endpoints, connecting to the output of vop.
Port 1: contained 1 endpoint, connecting to the input of panel.
+Optional property for different chips:
+- clocks: from common clock binding: handle to grf_vio clock.
+
+- clock-names: from common clock binding:
+ Required elements: "grf"
+
For the below properties, please refer to Analogix DP binding document:
* Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
- phys (required)