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authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>2020-02-21 08:52:29 +0100
committerVinod Koul <vkoul@kernel.org>2020-03-02 10:24:34 +0100
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tree30a2206ee0c534bf79e1ffd8c8d33dc87d0bd1eb /Documentation/devicetree/bindings/dma
parentdmaengine: ti: k3-udma: Implement support for atype (for virtualization) (diff)
downloadlinux-b9fb56b6ba8abc96484f007973ca00e30b104422.tar.xz
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dt-bindings: dmaengine: Add UniPhier external DMA controller bindings
Add devicetree binding documentation for external DMA controller implemented on Socionext UniPhier SOCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1582271550-3403-2-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
-rw-r--r--Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml63
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diff --git a/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml b/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml
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+++ b/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/socionext,uniphier-xdmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext UniPhier external DMA controller
+
+description: |
+ This describes the devicetree bindings for an external DMA engine to perform
+ memory-to-memory or peripheral-to-memory data transfer capable of supporting
+ 16 channels, implemented in Socionext UniPhier SoCs.
+
+maintainers:
+ - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
+
+allOf:
+ - $ref: "dma-controller.yaml#"
+
+properties:
+ compatible:
+ const: socionext,uniphier-xdmac
+
+ reg:
+ items:
+ - description: XDMAC base register region (offset and length)
+ - description: XDMAC extension register region (offset and length)
+
+ interrupts:
+ maxItems: 1
+
+ "#dma-cells":
+ const: 2
+ description: |
+ DMA request from clients consists of 2 cells:
+ 1. Channel index
+ 2. Transfer request factor number, If no transfer factor, use 0.
+ The number is SoC-specific, and this should be specified with
+ relation to the device to use the DMA controller.
+
+ dma-channels:
+ minimum: 1
+ maximum: 16
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#dma-cells"
+
+examples:
+ - |
+ xdmac: dma-controller@5fc10000 {
+ compatible = "socionext,uniphier-xdmac";
+ reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+ interrupts = <0 188 4>;
+ #dma-cells = <2>;
+ dma-channels = <16>;
+ };
+
+...