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authorThierry Reding <treding@nvidia.com>2015-07-30 10:32:46 +0200
committerThierry Reding <treding@nvidia.com>2015-08-13 13:49:36 +0200
commit3309ac836229d8bc3db7618e04a51334bef13b0a (patch)
tree6f3ac0759ebcb535ccd31a2bd351fcbfa686c498 /Documentation/devicetree/bindings/gpu
parentdrm/tegra: dc: Implement atomic DPMS (diff)
downloadlinux-3309ac836229d8bc3db7618e04a51334bef13b0a.tar.xz
linux-3309ac836229d8bc3db7618e04a51334bef13b0a.zip
drm/tegra: sor: Add Tegra210 eDP support
The SOR found on Tegra210 is very similar to the version found on Tegra124, except that it no longer supports LVDS. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/gpu')
-rw-r--r--Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt7
1 files changed, 4 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 009f4bfa1590..626115911282 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -197,9 +197,10 @@ of the following host1x client modules:
- sor: serial output resource
Required properties:
- - compatible: For Tegra124, must contain "nvidia,tegra124-sor". Otherwise,
- must contain '"nvidia,<chip>-sor", "nvidia,tegra124-sor"', where <chip>
- is tegra132.
+ - compatible: Should be:
+ - "nvidia,tegra124-sor": for Tegra124 and Tegra132
+ - "nvidia,tegra132-sor": for Tegra132
+ - "nvidia,tegra210-sor": for Tegra210
- reg: Physical base address and length of the controller's registers.
- interrupts: The interrupt outputs from the controller.
- clocks: Must contain an entry for each entry in clock-names.