summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/iommu
diff options
context:
space:
mode:
authorGeetha Sowjanya <geethasowjanya.akula@cavium.com>2017-06-23 15:34:36 +0200
committerWill Deacon <will.deacon@arm.com>2017-06-23 18:58:04 +0200
commitf935448acf462c26142e8b04f1c8829b28d3b9d8 (patch)
tree7516f4e4d39117e80be3b2859451725faded8271 /Documentation/devicetree/bindings/iommu
parentiommu/arm-smmu-v3: Enable ACPI based HiSilicon CMD_PREFETCH quirk(erratum 161... (diff)
downloadlinux-f935448acf462c26142e8b04f1c8829b28d3b9d8.tar.xz
linux-f935448acf462c26142e8b04f1c8829b28d3b9d8.zip
iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126
Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for all the interrupts. Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Geetha sowjanya <gakula@caviumnetworks.com> [will: reworked irq equality checking and added SPI check] Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'Documentation/devicetree/bindings/iommu')
-rw-r--r--Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
index e7855cf6038e..c9abbf3e4f68 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
@@ -26,6 +26,12 @@ the PCIe specification.
* "priq" - PRI Queue not empty
* "cmdq-sync" - CMD_SYNC complete
* "gerror" - Global Error activated
+ * "combined" - The combined interrupt is optional,
+ and should only be provided if the
+ hardware supports just a single,
+ combined interrupt line.
+ If provided, then the combined interrupt
+ will be used in preference to any others.
- #iommu-cells : See the generic IOMMU binding described in
devicetree/bindings/pci/pci-iommu.txt