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author | Daniel Kurtz <djkurtz@chromium.org> | 2014-11-03 03:53:28 +0100 |
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committer | Joerg Roedel <jroedel@suse.de> | 2014-11-03 17:29:09 +0100 |
commit | 656d7077d8ffd1c2492d4a0a354367ab2e545059 (patch) | |
tree | c3c313fe2faffe4f5c78029e8890c22370d8cbd9 /Documentation/devicetree/bindings/iommu | |
parent | iommu/rockchip: rk3288 iommu driver (diff) | |
download | linux-656d7077d8ffd1c2492d4a0a354367ab2e545059.tar.xz linux-656d7077d8ffd1c2492d4a0a354367ab2e545059.zip |
dt-bindings: iommu: Add documentation for rockchip iommu
Add binding documentation for Rockchip IOMMU.
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'Documentation/devicetree/bindings/iommu')
-rw-r--r-- | Documentation/devicetree/bindings/iommu/rockchip,iommu.txt | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt new file mode 100644 index 000000000000..9a55ac3735e5 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt @@ -0,0 +1,26 @@ +Rockchip IOMMU +============== + +A Rockchip DRM iommu translates io virtual addresses to physical addresses for +its master device. Each slave device is bound to a single master device, and +shares its clocks, power domain and irq. + +Required properties: +- compatible : Should be "rockchip,iommu" +- reg : Address space for the configuration registers +- interrupts : Interrupt specifier for the IOMMU instance +- interrupt-names : Interrupt name for the IOMMU instance +- #iommu-cells : Should be <0>. This indicates the iommu is a + "single-master" device, and needs no additional information + to associate with its master device. See: + Documentation/devicetree/bindings/iommu/iommu.txt + +Example: + + vopl_mmu: iommu@ff940300 { + compatible = "rockchip,iommu"; + reg = <0xff940300 0x100>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "vopl_mmu"; + #iommu-cells = <0>; + }; |