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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-10-30 08:09:18 +0100 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-10-30 08:09:18 +0100 |
| commit | 68fe0f0a6dcd2ac1ace5da3647a6d1cf0f4d2fea (patch) | |
| tree | 69d855c2e46d42ef8f23680cf3a1e6ff38de9ef4 /Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt | |
| parent | Input: wacom - add INPUT_PROP_DIRECT flag to Cintiq 24HD (diff) | |
| parent | Linux 3.7-rc3 (diff) | |
| download | linux-68fe0f0a6dcd2ac1ace5da3647a6d1cf0f4d2fea.tar.xz linux-68fe0f0a6dcd2ac1ace5da3647a6d1cf0f4d2fea.zip | |
Merge tag 'v3.7-rc3' into for-linus to sync up with recent USB changes
Diffstat (limited to 'Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt b/Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt new file mode 100644 index 000000000000..9ceb19e0c7fd --- /dev/null +++ b/Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt @@ -0,0 +1,52 @@ +* AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin + +Required properties: +- compatible : Should be "jedec,lpddr2-timings" +- min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32> +- max-freq : maximum DDR clock frequency for the speed-bin. Type is <u32> + +Optional properties: + +The following properties represent AC timing parameters from the memory +data-sheet of the device for a given speed-bin. All these properties are +of type <u32> and the default unit is ps (pico seconds). Parameters with +a different unit have a suffix indicating the unit such as 'tRAS-max-ns' +- tRCD +- tWR +- tRAS-min +- tRRD +- tWTR +- tXP +- tRTP +- tDQSCK-max +- tFAW +- tZQCS +- tZQinit +- tRPab +- tZQCL +- tCKESR +- tRAS-max-ns +- tDQSCK-max-derated + +Example: + +timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 { + compatible = "jedec,lpddr2-timings"; + min-freq = <10000000>; + max-freq = <400000000>; + tRPab = <21000>; + tRCD = <18000>; + tWR = <15000>; + tRAS-min = <42000>; + tRRD = <10000>; + tWTR = <7500>; + tXP = <7500>; + tRTP = <7500>; + tCKESR = <15000>; + tDQSCK-max = <5500>; + tFAW = <50000>; + tZQCS = <90000>; + tZQCL = <360000>; + tZQinit = <1000000>; + tRAS-max-ns = <70000>; +}; |