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authorThierry Reding <treding@nvidia.com>2016-04-12 17:07:35 +0200
committerRob Herring <robh@kernel.org>2016-04-20 00:25:18 +0200
commitf43521e9521133c169fe4b9255fb0917baf5ec84 (patch)
tree534e3d772386d08af5618430b8b3820c8646ae77 /Documentation/devicetree/bindings/memory-controllers
parentof: Add Inforce Computing to vendor prefix list (diff)
downloadlinux-f43521e9521133c169fe4b9255fb0917baf5ec84.tar.xz
linux-f43521e9521133c169fe4b9255fb0917baf5ec84.zip
dt-bindings: tegra: Remove 0, prefix from unit-addresses
When Tegra124 support was first merged the unit-addresses of all devices were listed with a "0," prefix to encode the reg property's second cell. It turns out that this notation is not correct, and the "," separator is only used to separate fields in the unit address (such as the device and function number in PCI devices), not individual cells for addresses with more than one cell. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
-rw-r--r--Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt6
-rw-r--r--Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt4
2 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt
index 3338a2834ad7..8dbe47013c2b 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra-mc.txt
@@ -61,7 +61,7 @@ specified, according to the board documentation:
Example SoC include file:
/ {
- mc: memory-controller@0,70019000 {
+ mc: memory-controller@70019000 {
compatible = "nvidia,tegra124-mc";
reg = <0x0 0x70019000 0x0 0x1000>;
clocks = <&tegra_car TEGRA124_CLK_MC>;
@@ -72,7 +72,7 @@ Example SoC include file:
#iommu-cells = <1>;
};
- sdhci@0,700b0000 {
+ sdhci@700b0000 {
compatible = "nvidia,tegra124-sdhci";
...
iommus = <&mc TEGRA_SWGROUP_SDMMC1A>;
@@ -82,7 +82,7 @@ Example SoC include file:
Example board file:
/ {
- memory-controller@0,70019000 {
+ memory-controller@70019000 {
emc-timings-3 {
nvidia,ram-code = <3>;
diff --git a/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt b/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt
index b59c625d6336..ba0bc3f12419 100644
--- a/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/tegra-emc.txt
@@ -190,7 +190,7 @@ be specified, according to the board documentation:
Example SoC include file:
/ {
- emc@0,7001b000 {
+ emc@7001b000 {
compatible = "nvidia,tegra124-emc";
reg = <0x0 0x7001b000 0x0 0x1000>;
@@ -201,7 +201,7 @@ Example SoC include file:
Example board file:
/ {
- emc@0,7001b000 {
+ emc@7001b000 {
emc-timings-3 {
nvidia,ram-code = <3>;