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authorAlban Bedel <albeu@free.fr>2015-05-31 01:52:24 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-06-21 21:54:01 +0200
commitfe41b466f9f4c45b3368dee4a50d7c77ae7f37f9 (patch)
tree27e1143154c084eccf567feb09d96c216013dbd8 /Documentation/devicetree/bindings/mips
parentmips: bcm47xx: allow retrieval of complete nvram contents (diff)
downloadlinux-fe41b466f9f4c45b3368dee4a50d7c77ae7f37f9.tar.xz
linux-fe41b466f9f4c45b3368dee4a50d7c77ae7f37f9.zip
DEVICETREE: Add bindings for the SoC of the ATH79 family
Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mips')
-rw-r--r--Documentation/devicetree/bindings/mips/ath79-soc.txt21
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mips/ath79-soc.txt b/Documentation/devicetree/bindings/mips/ath79-soc.txt
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index 000000000000..88a12a43e44e
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+++ b/Documentation/devicetree/bindings/mips/ath79-soc.txt
@@ -0,0 +1,21 @@
+Binding for Qualcomm Atheros AR7xxx/AR9XXX SoC
+
+Each device tree must specify a compatible value for the AR SoC
+it uses in the compatible property of the root node. The compatible
+value must be one of the following values:
+
+- qca,ar7130
+- qca,ar7141
+- qca,ar7161
+- qca,ar7240
+- qca,ar7241
+- qca,ar7242
+- qca,ar9130
+- qca,ar9132
+- qca,ar9330
+- qca,ar9331
+- qca,ar9341
+- qca,ar9342
+- qca,ar9344
+- qca,qca9556
+- qca,qca9558