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author | Stephen Warren <swarren@nvidia.com> | 2012-05-22 00:05:45 +0200 |
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committer | Stephen Warren <swarren@nvidia.com> | 2012-06-11 19:48:42 +0200 |
commit | f3d549dd5b217d084c9fe6581e0430909440de2b (patch) | |
tree | abc7b632477bd0d0c1fd5c5ab41ba2db02891ec0 /Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | |
parent | ARM: tegra20: Rename "emc" to "memory-controller" (diff) | |
download | linux-f3d549dd5b217d084c9fe6581e0430909440de2b.tar.xz linux-f3d549dd5b217d084c9fe6581e0430909440de2b.zip |
dt: name all Tegra binding docs consistently
Rename all Tegra binding documentation according to the first or
primary compatible value they describe. This provides a clear naming
scheme for the files, and prevents any naming conflicts should future
SoC versions require their own binding.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt')
-rw-r--r-- | Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt new file mode 100644 index 000000000000..f77c3031607f --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt @@ -0,0 +1,27 @@ +* NVIDIA Tegra Secure Digital Host Controller + +This controller on Tegra family SoCs provides an interface for MMC, SD, +and SDIO types of memory cards. + +Required properties: +- compatible : Should be "nvidia,<chip>-sdhci" +- reg : Should contain SD/MMC registers location and length +- interrupts : Should contain SD/MMC interrupt +- bus-width : Number of data lines, can be <1>, <4>, or <8> + +Optional properties: +- cd-gpios : Specify GPIOs for card detection +- wp-gpios : Specify GPIOs for write protection +- power-gpios : Specify GPIOs for power control + +Example: + +sdhci@c8000200 { + compatible = "nvidia,tegra20-sdhci"; + reg = <0xc8000200 0x200>; + interrupts = <47>; + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 155 0>; /* gpio PT3 */ + bus-width = <8>; +}; |