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| author | Robert Marko <robimarko@gmail.com> | 2022-07-04 16:35:53 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2022-07-12 12:44:17 +0200 |
| commit | 95a4cf7172bc356f072df4eea4d8d307bdb38d86 (patch) | |
| tree | 6d4e976eb9fafb34cb22da6d5879fc36bad892e2 /Documentation/devicetree/bindings/mmc | |
| parent | mmc: sdhci-of-at91: fix set_uhs_signaling rewriting of MC1R (diff) | |
| download | linux-95a4cf7172bc356f072df4eea4d8d307bdb38d86.tar.xz linux-95a4cf7172bc356f072df4eea4d8d307bdb38d86.zip | |
dt-bindings: mmc: sdhci-msm: document resets
Commit "mmc: sdhci-msm: Reset GCC_SDCC_BCR register for SDHC" added
support for utilizing a hardware reset and parsing it from DT, however
the bindings were not updated along with it.
So, document the usage of "resets" property with the limit of only one
item.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220704143554.1180927-1-robimarko@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc')
| -rw-r--r-- | Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 31a3ce208e1a..ca8814a80443 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -116,6 +116,9 @@ properties: description: Should specify pin control groups used for this controller. + resets: + maxItems: 1 + qcom,ddr-config: $ref: /schemas/types.yaml#/definitions/uint32 description: platform specific settings for DDR_CONFIG reg. |