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| author | Roger Quadros <rogerq@ti.com> | 2015-08-06 16:39:35 +0200 |
|---|---|---|
| committer | Roger Quadros <rogerq@ti.com> | 2016-04-15 10:55:37 +0200 |
| commit | 10f22ee367c4aff7841da6a83c10445d7d6328d9 (patch) | |
| tree | 31223517cf21ef6b15b86a65804bbc8b4e2ddcae /Documentation/devicetree/bindings/mtd | |
| parent | memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs (diff) | |
| download | linux-10f22ee367c4aff7841da6a83c10445d7d6328d9.tar.xz linux-10f22ee367c4aff7841da6a83c10445d7d6328d9.zip | |
mtd: nand: omap2: Implement NAND ready using gpiolib
The GPMC WAIT pin status are now available over gpiolib.
Update the omap_dev_ready() function to use gpio instead of
directly accessing GPMC register space.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mtd')
| -rw-r--r-- | Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt index ff3215d20343..3ee7e202657c 100644 --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt @@ -48,6 +48,7 @@ Optional properties: locating ECC errors for BCHx algorithms. SoC devices which have ELM hardware engines should specify this device node in .dtsi Using ELM for ECC error correction frees some CPU cycles. + - rb-gpios: GPIO specifier for the ready/busy# pin. For inline partition table parsing (optional): @@ -78,6 +79,7 @@ Example for an AM33xx board: nand-bus-width = <16>; ti,nand-ecc-opt = "bch8"; ti,nand-xfer-type = "polled"; + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; |