diff options
| author | Grygorii Strashko <grygorii.strashko@ti.com> | 2021-01-15 20:28:48 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2021-01-20 02:32:34 +0100 |
| commit | b3228c74e0d24976604e8550e9cccb83135f5302 (patch) | |
| tree | efe11b6cee28942343233d19b31e0e5f5dfaffc5 /Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml | |
| parent | Merge branch 'net-support-sctp-crc-csum-offload-for-tunneling-packets-in-some... (diff) | |
| download | linux-b3228c74e0d24976604e8550e9cccb83135f5302.tar.xz linux-b3228c74e0d24976604e8550e9cccb83135f5302.zip | |
dt-binding: ti: am65x-cpts: add assigned-clock and power-domains props
The CPTS clock is usually a clk-mux which allows to select CPTS reference
clock by using 'assigned-clock-parents', 'assigned-clocks' DT properties.
Also depending on integration the power-domains has to be specified to
enable CPTS IP.
Hence add 'assigned-clock-parents', 'assigned-clocks' and 'power-domains'
properties to the CPTS DT bindings to avoid dtbs_check warnings:
cpts@310d0000: 'assigned-clock-parents', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
cpts@310d0000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml index 9b7117920d90..ce43a1c58a57 100644 --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml @@ -73,6 +73,13 @@ properties: items: - const: cpts + assigned-clock-parents: true + + assigned-clocks: true + + power-domains: + maxItems: 1 + ti,cpts-ext-ts-inputs: $ref: /schemas/types.yaml#/definitions/uint32 maximum: 8 |